1. Field of the Invention
The present invention relates to a dual face package and a method of manufacturing the same, and more particularly to a dual face package and a method of manufacturing the same in which an upper substrate serving as a resin sealing layer is prepared in advance and the upper substrate is attached to a semiconductor substrate through an adhesive layer disposed therebetween.
2. Description of the Related Art
With increase in demand for the miniaturization and increased functionality of various electronic devices, semiconductor packages gradually have been becoming structures of high density, high performance and low cost as time goes by. Accordingly, intensive research into the manufacture of three-dimensional chip stacked packages using three-dimensional mounting technology is actively being conducted in order to realize high integration of semiconductor packages.
Three-dimensional mounting technology may be currently classified into three technologies. The first is a PoP (Package on Package) technology of stacking packages one on another, each of which includes one or more semiconductor chips, the second is a MCP (Multi Chip Package) technology of mounting a plurality of LSI chips on one package, and the third is a TSV (Through Silicon Via) technology of arranging through-electrodes in a silicon substrate of a LSI chip. It is widely maintained that development of the three-dimensional mounting technology is directed toward a three-dimensionally stackable structure which is simply configured to have a size as small as possible, which is close to the size of a chip and which is easy to test.
Particularly, since the PoP technology has an advantage in that packages are individually tested and because among all the packages only sound ones are stacked one on another, thus increasing a yield in an assembling operation, the stacked packages are being incorporated in high-performance mobile-phones.
In the field of PoP technology, because a mounting height of package is relatively high and the free arrangement of the terminals of stacked packages is restricted, reliability of connection between the packages is decreased. To overcome the above problem with the conventional PoP technology, a so-called dual face package, which enables external connecting terminals to be formed at predetermined positions on upper and lower surfaces thereof, respectively, and a method of manufacturing the dual face package are currently getting a lot of attention.
The conventional dual face package is usually manufactured in a way such that through-electrodes connected to die pads are formed in a semiconductor substrate to allow external connecting terminals to be formed at a lower surface of the package, resin sealing material such as epoxy molding compound (EMC) is transfer-molded into a resin sealing layer on the semiconductor substrate using a mold to allow external connecting terminals to be formed on an upper surface of the package, and post electrodes connected to the die pads of the semiconductor substrate are formed in the resin sealing layer.
However, according to the conventional technology, there is some difficulty in molding a resin sealing layer on a semiconductor substrate. More specifically, when a resin sealing material is formed on a semiconductor substrate through a transfer molding process for the wafer level packaging, resin sealing material which was previously injected becomes cured in the course of the transfer molding, thus making the formation of resin sealing layer on the entire area of a semiconductor substrate difficult.
Furthermore, since gas is released from a resin sealing layer which is being cured, the resin sealing layer becomes separated from a semiconductor substrate, thus deteriorating the reliability of packages.